Patent · US Active

Computer-implemented perceptual apparatus

US12019412B2 · kind B2 · utility

0Cited by
2References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 26, 2023
Grant dateJun 25, 2024
Priority date
Expiry dateJun 26, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06V10/955
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An autonomous module for processing stored data includes a multithreaded processor core (MPC) and a plurality of autonomous memories. Each of the plurality of autonomous memories has a memory bank, a data operator (DO) configured to implement a plurality of selectable memory behaviors, an autonomous memory operator (AMO) configured to implement a state machine to control the memory bank independently of the MPC, and at least one memory input/output (IO) port communicatively coupled with the memory bank, the AMO, and the DO. The at least one memory IO port is configured to receive a read instruction from the AMO, retrieve data from the memory bank, and send the data to the DO. The DO is configured to implement one of the plurality of selectable memory behaviors to update the data and send the updated data to the AMO via the at least one memory IO port.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.