System support for persistent cache flushing
US12019556B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 25, 2022 |
| Grant date | Jun 25, 2024 |
| Priority date | — |
| Expiry date | Aug 31, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are described herein for flushing volatile system memory to persistent memory after the loss of alternating current (AC) power. In some embodiments, the techniques include implementing an extended hold-up window long enough to complete a full flush of processor caches and memory controller buffers using energy available in the bulk capacitors of one or more power supplies after a power outage event. The voltage on the bulk capacitors within the one or more power supply units may be monitored, and a notification may be triggered when a programmable threshold voltage is detected on the bulk capacitors. The system may configure the voltage threshold to indicate that a certain minimum amount of energy used to successfully complete a cache flush operation is available. The techniques allow flushing volatile system caches without relying on battery backup units (BBUs), which may be cumbersome to install and maintain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.