Integrated circuit including a capacitive structure of the metal-insulator-metal type and corresponding manufacturing method
US12021074B2 · kind B2 · utility
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2References
17Claims
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Key dates
| Filing date | Nov 2, 2021 |
| Grant date | Jun 25, 2024 |
| Priority date | — |
| Expiry date | Nov 2, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/212
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes a semiconductor substrate, a conductive layer above a front face of the substrate, a first metal track in a first metal level, and a pre-metal dielectric region located between the conductive layer and the first metal level. A metal-insulator-metal-type capacitive structure is located in a trench within the pre-metal dielectric region. The capacitive structure includes a first metal layer electrically connected with the conductive layer, a second metal layer electrically connected with the first metal track, and a dielectric layer between the first metal layer and the second metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.