Neural network processing method and server and electrical device therefor
US12021986B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2021 |
| Grant date | Jun 25, 2024 |
| Priority date | — |
| Expiry date | Jan 23, 2043 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A neural network (NN) processing method is provided. An AI (artificial intelligence) compiler code of an AI compiler is transformed to a garbled circuit code by performing following steps. A circuit graph of a garbled circuit having logic gates corresponding to the garbled circuit code is sent to an electrical device by a server. Key codebooks for candidate gates corresponding to each logic gate are creating by the electrical device. Garbled truth tables for the candidate gates corresponding to each logic pate are generated and transmitted to the server by the electrical device through using OT (Oblivious Transfer) protocol. A target garbled truth table of each logic gate is generated by the server. Afterward, an NN model is encrypted according to the key codebooks by the electrical device and a compiled NN model of an encrypted NN model are generated by the server.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.