Dual wafer plating fixture for a continuous plating line
US12024785B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2023 |
| Grant date | Jul 2, 2024 |
| Priority date | — |
| Expiry date | Feb 8, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F19/902
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the two substrates coupled to the carrier bus. A method of electroplating a plurality of substrates. The method including: mounting two substrates to be plated onto a wafer plating fixture; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.