Isolation circuit systems and methods thereof
US12028028B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 30, 2021 |
| Grant date | Jul 2, 2024 |
| Priority date | — |
| Expiry date | Mar 13, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/537
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital isolator device which includes a first input buffer configured to receive a first differential signal from a transmitter and to provide a second differential signal, the first differential signal being characterized by a first magnitude, the second differential signal being characterized by a second magnitude, the first magnitude being greater than the second magnitude. The device also includes a second input buffer configured to receive a third differential signal from the transmitter and to provide a fourth differential signal, the second input buffer being coupled to the second ground terminal. The device also includes a common-mode circuit coupled to the second differential signal and the fourth differential signal, the common-mode circuit being configured to reduce a common-mode transient voltage, the common-mode transient voltage being associated with a voltage differential between the first ground terminal and the second ground terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.