Co-manufacturing of silicon-on-insulator waveguides and silicon nitride waveguides for hybrid photonic integrated circuits
US12032205B2 · kind B2 · utility
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Key dates
| Filing date | Sep 19, 2023 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Sep 19, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02B2006/12197
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of co-manufacturing silicon waveguides, SiN waveguides, and semiconductor structures in a photonic integrated circuit. A silicon waveguide structure can be formed using a suitable process, after which it is buried in a cladding. The cladding is polished, and a silicon nitride layer is disposed to define a silicon nitride waveguide. The silicon nitride waveguide is buried in a cladding, and annealed. Thereafter, cladding above the silicon waveguide structure can be trenched through, and low-temperature operations can be performed to or with an exposed surface of the silicon waveguide structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.