Batched quantum circuits simulation on a graphics processing unit
US12032888B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 10, 2021 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Mar 9, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/343
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, computer-implemented methods, and computer program products to facilitate batched quantum circuits simulation on a graphics processing unit are provided. According to an embodiment, a system can comprise a first processor that executes computer executable components stored in memory. The computer executable components can comprise a generalization component that generates a first defined matrix representation of a qubit gate and that employs a control mask to generate a second defined matrix representation of a multi-qubit gate. The computer executable components can further comprise an execution component that executes a kernel overhead operation using the first defined matrix representation and the second defined matrix representation to generate a batched kernel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.