Shift register in display, gate drive circuit, display device, and driving method for same
US12033554B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2021 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Apr 12, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register, a gate drive circuit, a display device, and a driving method for the same. The shift register comprises a first output sub-circuit, which provides, under control of an INPUT or a RESET, a signal of a CN or a CNB to a pull-up node, outputs, according to a voltage level of the pull-up node, a signal of a CK to an OUT, transmits, under control of a CKB, a CKB to a pull-down node, and pulls down, according to a voltage level of the pull-down node, a voltage level of the OUT; a second output sub-circuit, which outputs, during a scan output stage and under control of a GON, a signal of the OUT to a GOUT; and a transfer sub-circuit, which pulls down, during a scan transfer stage and under control of a GOFF, a voltage level of the GOUT.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.