Array substrate, display panel, spliced display panel and display driving method
US12033571B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2023 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Apr 26, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/04
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array substrate includes M pixel lines and N pixel circuit groups. The M pixel lines are disposed in a display area and arranged in a first direction. The N pixel circuit groups are arranged in the first direction. M is an integer greater than or equal to 2, and N is a positive integer less than M. A pixel circuit group of the N pixel circuit groups is electrically connected to adjacent two pixel lines of the M pixel lines, and the first direction is one of a row direction and a column direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.