Array substrate, manufacturing method thereof, and display device
US12034011B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 21, 2023 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Sep 21, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2300/0426
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a display area and a non-display area in which a peripheral circuit is provided. The peripheral circuit includes a test area, a bonding area, and a cutting area. The test area is provided with a test signal line for providing a test signal. The bonding area is adjacent to the display area, and the bonding area and the test area are electrically connected through signal leads. The cutting area is disposed between the test area and the bonding area. After a cutting process is completed in the cutting area, a cutting opening is formed on each signal lead. A position of the cutting opening of at least one signal lead is different from positions of the cutting openings of other signal leads in height along an extending direction of the signal leads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.