Technologies for dynamic cooling in a multi-chip package with programmable impingement valves
US12035507B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2022 |
| Grant date | Jul 9, 2024 |
| Priority date | — |
| Expiry date | Apr 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L25/0655
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Technologies for dynamic cooling include a computing device having a multi-chip package including multiple dies and a cold plate coupled to the multi-chip package. Micro nozzle valves are coupled to fluid passage zones of the cold plate positioned adjacent to the dies, and are configured to control fluid flow into the fluid passage zones. The computing device reads a predetermined die junction temperature for each die, determines a current die junction temperature for each die, compares the predetermined die junction temperature to the current die junction temperature for each die, and determines a fluid flow rate for each die based on that comparison. The computing device controls the micro nozzle valves adjacent to each die based on the respective fluid flow rate. The dies may include processor cores, field-programmable gate arrays, memory devices, or other computer chips. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.