Learning-based high-performance, energy-efficient, fault-tolerant on-chip communication design framework
US12040897B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2019 |
| Grant date | Jul 16, 2024 |
| Priority date | — |
| Expiry date | Jun 1, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A proactive fault-tolerant scheme which improves performance and energy efficiency for NoCs. The fault-tolerant scheme allows routers to switch among several different fault-tolerant operations. Each operation mode has different trade-offs among fault-tolerant capability, retransmission traffic, latency, and energy efficiency. Another example provides a proactive, dynamic control policy to balance and optimize the dynamic interactions and trade-offs. The example control policy uses example machine learning algorithm called reinforcement learning (RL). The example RL-based controller independently observes a set of NoC system parameters at runtime, and over time they evolve optimal per-router control policies. By automatically and optimally switching among the four fault-tolerant modes, the trained control policy results in minimizing system level network latency and maximizing energy efficiency while detecting and correcting errors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.