Chip module, communication system, and port allocation method
US12040996B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2022 |
| Grant date | Jul 16, 2024 |
| Priority date | — |
| Expiry date | Dec 29, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4265
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A chip module has a plurality of first ports, at least some or all of the first ports are first selection ports, and each first selection port may act as a write port or a read port. The chip module further includes a first control module. The first control module controls, based on a transmit/receive requirement of the chip module, the first selection port to be switched to a read port or a write port, to match the transmit/receive requirement of the chip module. The first selection port may selectively act as a read port or a write port, so that switching can be performed based on an operating state of the chip module, increasing a read/write bandwidth. The first control module controls an operating state of the first selection port, to flexibly adjust a quantity of read ports and a quantity of write ports of the chip module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.