Reducing timing skew in a circuit path
US12041713B2 · kind B2 · utility
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41References
20Claims
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Key dates
| Filing date | Aug 23, 2017 |
| Grant date | Jul 16, 2024 |
| Priority date | — |
| Expiry date | Aug 23, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example method performed for a circuit path includes: receiving signals in the circuit path; and controlling states of the signals in the circuit path based on skews produced by circuits electrically connected in series in the circuit path. The states are controlled by inverting or not inverting the signals in the circuit path so that skews produced by different circuits in the circuit paths at least partially cancel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.