Semiconductor structure and method for manufacturing semiconductor structure
US12046478B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2022 |
| Grant date | Jul 23, 2024 |
| Priority date | — |
| Expiry date | Dec 1, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor structure includes: a substrate is provided; the substrate is etched to form a blind hole, a sidewall of the blind hole has a first roughness; at least one planarization process is performed on the sidewall of the blind hole until the sidewall of the blind hole has a preset roughness less than the first roughness. The planarization process includes: a first sacrificial layer is formed on the sidewall of the blind hole; a reaction source gas is provided such that the reaction source gas reacts with the first sacrificial layer and a portion of the substrate at the sidewall of the blind hole to form a second sacrificial layer; and the second sacrificial layer is removed, and after the second sacrificial layer is removed, the sidewall of the blind hole has a second roughness less than the first roughness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.