Patent · US Active

Manufacturing method of semiconductor structure and semiconductor structure

US12046630B2 · kind B2 · utility

0Cited by
4References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 25, 2021
Grant dateJul 23, 2024
Priority date
Expiry dateNov 9, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/662

Abstract

The present disclosure provides a manufacturing method of a semiconductor structure and a semiconductor structure, and relates to the technical field of semiconductors. The manufacturing method includes: providing a base, wherein the base is provided with an active region; forming a gate layer on the base; forming isolation structures on a periphery of the gate layer, wherein in a direction away from the gate layer, each of the isolation structures at least includes a hollow portion and an isolation portion; forming an insulating structure on top surfaces of the isolation structures; forming contact plugs, wherein the contact plugs penetrate the insulating structure; an end of each of the contact plugs close to the base is electrically connected to the active region; each of the contact plugs is located on a side of each of the isolation structures away from the gate layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.