Integrated circuit structures including a titanium silicide material

US12046654B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Dan S. LAVRIC · Beaverton, US
• Glenn A. Glass · Portland, US
• Thomas T. TROEGER · Portland, US
• Suresh Vishwanath · Portland, US
• Jitendra Kumar Jha · Hillsboro, US
• John F. Richards · Brighton, US
• Anand S. Murthy · Beaverton, US
• Srijit Mukherjee · Hillsboro, US

Key dates

• Filing date: Jun 25, 2020
• Grant date: Jul 23, 2024
• Expiry date: Nov 23, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/121
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Approaches for fabricating an integrated circuit structure including a titanium silicide material, and the resulting structures, are described. In an example, an integrated circuit structure includes a semiconductor fin above a substrate, a gate electrode over the top and adjacent to the sidewalls of a portion of the semiconductor fin. A titanium silicide material is in direct contact with each of first and second epitaxial semiconductor source or drain structures at first and second sides of the gate electrode. The titanium silicide material is conformal with and hermetically sealing a non-flat topography of each of the first and second epitaxial semiconductor source or drain structures. The titanium silicide material has a total atomic composition including 95% or greater stoichiometric TiSi2.