Patent · US Active

DEPFET transistor and method of manufacturing a DEPFET transistor

US12046674B2 · kind B2 · utility

0Cited by
1References
7Claims
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Key dates

Filing dateMay 6, 2020
Grant dateJul 23, 2024
Priority date
Expiry dateNov 26, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/26586
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The invention relates to a DEPFET comprising: a semiconductor substrate (100) of a first conduction type, which has a first main surface (101) and a second main surface (102), which are opposite one another; a source terminal region (1s) of a second conduction type on the first main surface (101); a drain terminal region (1d) of a second conduction type; a channel region (10), which is arranged between the source terminal region (1s) and the drain terminal region (1d); a gate electrode (11), which is separated from the channel region (10) by a gate insulator (6); a rear activation region (104) of a second conduction type, which is formed on the second main surface (102); and a substrate doping increase region (2) of a first conduction type, which is formed at least under the source terminal region (1s) and under the channel region (10), the substrate doping increase region (2) having a signal charge control region (20) of the first conduction type below the gate electrode (11), in which signal charge control region the effective doping dose has a higher value than at other points of the substrate doping increase region (2) below the gate electrode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.