Integrated circuit devices
US12046682B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 8, 2022 |
| Grant date | Jul 23, 2024 |
| Priority date | — |
| Expiry date | Apr 13, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0142
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) device includes a fin-type active region on a substrate. A mesa-type channel region protrudes from the fin-type active region in a vertical direction. The mesa-type channel region is integrally connected with the fin-type active region. A gate line substantially surrounds a mesa-type channel region on the fin-type active region. A gate dielectric film is between the mesa-type channel region and the gate line. The mesa-type channel region includes: a plurality of round convex portions, which are convex toward the gate line; a concavo-convex sidewall, which includes a portion of each of the plurality of round convex portions and faces the gate line; and at least one void, which is inside the mesa-type channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.