Method for preparing semiconductor structure and semiconductor structure
US12048138B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2021 |
| Grant date | Jul 23, 2024 |
| Priority date | — |
| Expiry date | Dec 7, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
Abstract
The present application provides a method for preparing a semiconductor structure and a semiconductor structure, relating to the technical field of semiconductors. The method for preparing a semiconductor structure includes: providing a base; forming a support layer having capacitor holes and electric contact structures; forming a first dielectric layer in the capacitor holes, the first dielectric layer surrounding first intermediate holes; forming a first electrode layer in the first intermediate holes, the first electrode layer filling the first intermediate holes; removing part of the support layer to form second intermediate holes; forming a second dielectric layer in the second intermediate holes, the first dielectric layer and the second dielectric layer forming a dielectric layer; and, forming a second electrode layer on the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.