Patent · US Active

Manufacturing method of semiconductor structure using first mask layer and first photoresist layer to selectively etch stack on complete die region

US12048139B2 · kind B2 · utility

0Cited by
4References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 11, 2021
Grant dateJul 23, 2024
Priority date
Expiry dateJul 21, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/00

Abstract

The present disclosure provides a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method includes: providing a substrate, where the substrate includes a complete die region and an incomplete die region; forming a stack on the substrate; forming a first mask layer with a first pattern on the stack; forming a first photoresist layer on the first mask layer; exposing the first photoresist layer, and developing to remove the first photoresist layer on the complete die region; and etching the stack by using the first mask layer on the complete die region and the first photoresist layer on the incomplete die region as masks.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.