Electronic devices having quadratic phase generation circuitry
US12052047B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2023 |
| Grant date | Jul 30, 2024 |
| Priority date | — |
| Expiry date | May 18, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B2001/6912
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An electronic device may include wireless circuitry. The wireless circuitry may include a quadratic phase generator for outputting a perfectly interpolated constant amplitude zero autocorrelation (CAZAC) sequence for a transmit path. The quadratic phase generator may include a numerically controlled oscillator, a switch controlled based on a value output from the numerically controlled oscillator, a first integrator stage, and a second integrator stage connected in series with the first integrator stage. The numerically controlled oscillator may receive as inputs a chirp count and a word length. The switch may be configured to switchably feed one of two input values that are a function of the chirp count and the word length to the first integrator stage. The quadratic phase generator may output full-bandwidth chirps or reduced-bandwidth chirps. Bandwidth reduction can be achieved by scaling the two input values of the switches.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.