Local oscillator driver circuitry with second harmonic rejection
US12052048B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2022 |
| Grant date | Jul 30, 2024 |
| Priority date | — |
| Expiry date | Nov 27, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic device may include wireless circuitry having a mixer configured to receive an oscillating signal from oscillator circuitry. The oscillator circuitry can include a chain of buffer circuits sometimes referred to as oscillator driver circuitry. Transformers may be coupled at the input and output of each buffer circuit in the chain. Adjustable biasing circuits may be formed at the input of a selected buffer circuit in the chain of the buffer circuits. The adjustable biasing circuits can be digital-to-analog converters (DACs). The adjustable biasing circuits may be configured to apply a differential direct current (DC) offset voltage to the input of the selected buffer circuit. The differential DC offset voltage can have a value chosen to minimize a second harmonic component of the oscillator driver circuitry. Configured and operated in this way, a second harmonic conversion gain of the mixer can be reduced and can improve the transmit and receive performance of the wireless circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.