Cryogenic microfluidic cooling for photonic integrated circuits
US12055755B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 6, 2022 |
| Grant date | Aug 6, 2024 |
| Priority date | — |
| Expiry date | Feb 1, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N10/20
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method includes fabricating a device including a first dielectric layer, an optical waveguide in the first dielectric layer, and a superconducting circuit in the first dielectric layer and on the optical waveguide. The method also includes forming a sacrificial structure on the first dielectric layer, the sacrificial structure aligned with the superconducting circuit, depositing a second dielectric layer on the sacrificial structure, and cutting an opening in the second dielectric layer to expose the sacrificial structure. The method further includes wet etching the sacrificial structure through the opening and sealing the opening in the second dielectric layer with a third dielectric layer to form a micro-channel between the first dielectric layer and the second dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.