Memory package, storage device including memory package, and storage device operating method
US12057191B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2023 |
| Grant date | Aug 6, 2024 |
| Priority date | — |
| Expiry date | Apr 11, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06586
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory package includes; a first memory chip including first memory pads, and a buffer chip including first buffer pads respectively connected with the first memory pads and second buffer pads connected with an external device. The buffer chip respectively communicates signals received via the second buffer pads to the first buffer pads in response to a swap enable signal having a disabled state, and the buffer chip swaps signals received via the second buffer pads to generate first swapped signals, and respectively communicates the first swapped signals to the first buffer pads in response to the swap enable signal having an enabled state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.