Semiconductor package including plurality of recesses and molding member with plurality of protrusions that fill the recesses
US12057357B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2021 |
| Grant date | Aug 6, 2024 |
| Priority date | — |
| Expiry date | May 8, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a base substrate that includes a first surface and a second surface that face each other, a plurality of first metal line patterns disposed on the first surface, a plurality of second metal line patterns disposed on the second surface, a plurality of vias that penetrate the base substrate and connect the first metal line patterns to the second metal line patterns, a semiconductor chip disposed on the first surface, and a molding member that covers the first surface and the semiconductor chip. The base substrate includes at least one recess at a corner of the base substrate. The recess extends from the first surface toward the second surface. The molding member includes a protrusion that fills the recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.