Semiconductor devices and methods of manufacturing semiconductor devices
US12057378B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2021 |
| Grant date | Aug 6, 2024 |
| Priority date | — |
| Expiry date | May 29, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48245
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one example, a packaged electronic device includes a molded substrate. The molded substrate includes a conductive structure having an edge lead with an edge lead outward side and an edge lead inward side opposite to the edge lead outward side, and an inner lead having an inner lead outward side and an inner lead inward side opposite to the inner lead outward side. The molded substrate includes a substrate encapsulant covering a lower portion of the edge lead inward side, a lower portion of the inner lead inward side, and a lower portion of the inner lead outward side. An upper portion of the edge lead outward side and an upper portion of the inner lead outward side are exposed from the substrate encapsulant. An electronic component is connected to the edge lead and the inner lead. A body encapsulant covers the electronic component and portions of the conductive structure. The body encapsulant has a body encapsulant top side and body encapsulant sides, the upper portion of the edge lead outward side is exposed from one of the body encapsulant sides, and the body encapsulant covers the upper portion of the inner lead outward side and the upper portion of the inner lead inward side…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.