Optimized power delivery for multi-layer substrate
US12057379B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 24, 2022 |
| Grant date | Aug 6, 2024 |
| Priority date | — |
| Expiry date | Oct 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5383
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multi-layer substrate stacking a plurality of insulating substrates supports one or more devices. Each substrate includes a face supporting conductive traces and edges surrounding the face at a substantially perpendicular angle. The multi-layer substrate includes a ground plane on a first substrate and a power plane on a second substrate. The ground plane is connected to at least one ground pad disposed on a first edge of the first substrate, which provides a low inductance ground path to the ground plane. The power plane is connected to at least one power pad disposed on a second edge of the second substrate, which provides a low inductance power path to the power plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.