Operating voltage-triggered semiconductor controlled rectifier

US12057444B2 · kind B2 · utility

Assignee

• GLOBALFOUNDRIES U.S. Inc. · US

Inventors

• Souvick Mitra · South Burlington, US
• Alain Loiseau · Williston, US
• Robert J. Gauthier, JR. · Williston, US
• Meng Miao · Williston, US
• Anindya Nath · Butlers Corners, US
• Wei Liang · South Burlington, US

Key dates

• Filing date: Jun 23, 2022
• Grant date: Aug 6, 2024
• Expiry date: Feb 21, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D18/251

Abstract

A structure includes trigger control circuitry for an SCR including: a first transistor having two P-type semiconductor terminals connected to an Nwell and a Pwell of the SCR; a second transistor having two N-type semiconductor terminals connected to the Pwell and ground; and, optionally, an additional transistor having two P-type semiconductor terminals connected to the Nwell and ground. Control terminals of the transistors receive the same control signal (e.g., RST from a power-on-reset). When a circuit connected to the SCR for ESD protection is powered on, ESD risk is limited so RST switches to high. Thus, the first transistor and optional additional transistor turn off and the second transistor turns on, reducing leakage. When the circuit is powered down, the ESD risk increases so RST switches to low. Thus, the first transistor and optional additional transistor turn on and the second transistor turns off, lowering the trigger voltage and current.