Integrated circuit device and method for forming the same
US12062540B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 25, 2022 |
| Grant date | Aug 13, 2024 |
| Priority date | — |
| Expiry date | Jun 17, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming an integrated circuit device is provided. The method includes forming a transistor over a frontside of a substrate; forming an interconnect structure over the transistor; depositing a first transition metal layer over the interconnect structure; performing a plasma treatment to turn the first transition metal layer into a first transition metal dichalcogenide layer; forming a dielectric layer over the first transition metal dichalcogenide layer; forming a first gate electrode over the dielectric layer and a first portion of the first transition metal dichalcogenide layer; and forming a first source contact and a first drain contact respectively connected with a second portion and a third portion of the first transition metal dichalcogenide layer, the first portion of the first transition metal dichalcogenide layer being between the second and third portions of the first transition metal dichalcogenide layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.