Zero mask high density capacitor
US12062652B2 · kind B2 · utility
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2References
20Claims
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Key dates
| Filing date | Jan 12, 2023 |
| Grant date | Aug 13, 2024 |
| Priority date | — |
| Expiry date | Jan 23, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/68
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and semiconductor devices are described herein which eliminate the use of additional masks. A first interconnect layer is formed. A first resistive layer is formed on top of the first interconnect layer. A dielectric layer is formed on top of the first resistive layer. A second resistive layer is formed on top of the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.