Semiconductor devices
US12062662B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2023 |
| Grant date | Aug 13, 2024 |
| Priority date | — |
| Expiry date | May 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0186
Abstract
A semiconductor device includes a plurality of active fins extending in a first direction, and spaced apart from each other in a second direction, the plurality of active fins having upper surfaces of different respective heights, a gate structure extending in the second across the plurality of active fins, a device isolation film on the substrate, a source/drain region on the plurality of active fins, and including an epitaxial layer on the plurality of active fins, an insulating spacer on an upper surface of the device isolation film and having a lateral asymmetry with respect to a center line of the source/drain region in a cross section taken along the second direction, an interlayer insulating region on the device isolation film and on the gate structure and the source/drain region, and a contact structure in the interlayer insulating region and electrically connected to the source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.