Oscillator monitoring circuits for different oscillator domains
US12063046B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2022 |
| Grant date | Aug 13, 2024 |
| Priority date | — |
| Expiry date | Jan 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/19
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Clock monitors for circuits having a plurality of oscillators. The clock monitors produce an error indication when one oscillator is determined to be outside of a desired operating range or beyond a defined threshold with respect to a second oscillator. The clock monitors include a synchronizer configured to receive a clock signal from a first oscillator of the plurality of oscillators and synchronize the received clock signal with a second oscillator and to produce a synchronized clock signal. The clock monitors can include a counter configured to produce a count value based on synchronized clock signal. The clock monitors include comparison circuitry configured to receive the count value and produce an error indication when the count value is outside a predetermined range. The clock monitors may be used to ensure correct clock operation for different transition scenarios, e.g., turning on or off a certain clock or power domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.