Patent · US Active

Memory arrays and methods used in forming a memory array comprising strings of memory cells

US12063783B2 · kind B2 · utility

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2Claims
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Inventors

Key dates

Filing dateMar 3, 2023
Grant dateAug 13, 2024
Priority date
Expiry dateMar 3, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B43/10
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

In some embodiments, a memory array comprising strings of memory cells comprise laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Insulative pillars are laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks. The pillars comprise vertically-spaced and radially-projecting insulative rings in the conductive tiers as compared to the insulative tiers. Other embodiments, including methods, are disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.