Leadless semiconductor package with shielded die-to-pad contacts
US12068228B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 15, 2021 |
| Grant date | Aug 20, 2024 |
| Priority date | — |
| Expiry date | Sep 8, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/49861
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A leadless semiconductor package includes a conductive base having a plurality of apertures formed around a perimeter of the conductive base and extending from a first surface to an opposing second surface of the conductive base. The semiconductor package further includes an IC die having a third surface facing the first surface of the conductive base and having a plurality of conductive pillars disposed thereon. Each conductive pillar extends from the third surface to the first surface via a corresponding aperture. A dielectric fill material is disposed in the apertures and insulates the conductive pillars from the conductive material of the conductive base. An opening of an aperture at the second surface, the bottom end of the conductive pillar disposed therein, and the dielectric fill material at the opening of the aperture at the second surface together form a surface mount pad for mounting the semiconductor package to a corresponding pad of a circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.