High power density 3D semiconductor module packaging
US12068298B2 · kind B2 · utility
0Cited by
6References
18Claims
0Family size
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Key dates
| Filing date | Nov 2, 2020 |
| Grant date | Aug 20, 2024 |
| Priority date | — |
| Expiry date | Jan 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15747
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
We herein describe a semiconductor device sub-assembly comprising at least two power semiconductor devices and a contact of a first type. A first power semiconductor device is located on a first side of the contact of a first type, and a second power semiconductor device is located on a second side of the contact of a first type, where the second side is opposite to the first side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.