Multi-bit scan chain with error-bit generator
US12068745B2 · kind B2 · utility
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28References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 31, 2021 |
| Grant date | Aug 20, 2024 |
| Priority date | — |
| Expiry date | Oct 7, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1737
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Various implementations described herein are directed to a device having a scan chain that receives a multi-bit input, provides a multi-bit output, and provides a multi-bit multiplexer output based on the multi-bit input and the multi-bit output. The device may have an error-bit generator that receives the multi-bit multiplexer output, receives a portion of the multi-bit input, receives a portion of the multi-bit output, and provides an error-bit output based on the multi-bit multiplexer output, the portion of the multi-bit input, and the portion of the multi-bit output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.