Signal gain tuning circuit and method having adaptive mechanism
US12068753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2022 |
| Grant date | Aug 20, 2024 |
| Priority date | — |
| Expiry date | Mar 15, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/185
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a signal gain tuning circuit having adaptive mechanism. An amplifier receives an analog signal to generate a tuned analog signal to an ADC circuit to further generate a digital signal. A gain control capacitor array and the amplifier together determine a gain of the tuned analog signal. The control circuit receives an actual level of the digital signal to determine an offset of the digital signal and an estimated level to generate a tuning control signal. Each of coarse-tuning capacitors of a coarse-tuning capacitor array corresponds to a first tuning amount relative to a maximal gain. Each of fine-tuning capacitors of a fine-tuning capacitor array corresponds to a second tuning amount relative to the maximal gain. A tuning capacitor enabling combination of the coarse-tuning and fine-tuning capacitor arrays are determined according to the tuning control signal to tune the gain and decrease the offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.