Bias current with hybrid temperature profile
US12072722B2 · kind B2 · utility
1Cited by
13References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2022 |
| Grant date | Aug 27, 2024 |
| Priority date | — |
| Expiry date | Sep 1, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/262
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Aspects of the present disclosure include a hybrid circuit, including a first current sink configured to sink a zero temperature coefficient (ZTC) current, a second current sink configured to sink a positive temperature coefficient (PTC) current, a first transistor configured to provide a first current, a second transistor configured to provide a second current, a third transistor configured to provide a third current mirroring the ZTC current, a fourth transistor configured to provide a sum current of the first current and the third current, and a current mirror configured provide a hybrid current mirroring the sum current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.