Memory coherency in application-level virtualization
US12072804B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 2022 |
| Grant date | Aug 27, 2024 |
| Priority date | — |
| Expiry date | Feb 22, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0815
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A coherence protocol applied to memory pages maintains coherence between memory spaces on a plurality of nodes so that the threads of the runtime are operable on any of the nodes. The nodes operating according to the coherence protocol track a state and an epoch number for each memory page residing therein. The states include a modified state in which only one particular node has an up-to-date copy of the memory page, an exclusive state in which only one particular node owns the memory page, a shared state in which all nodes that have the memory page in the shared state have the same copy, and a lost state in which the memory page cannot be either read or written. The epoch number is a number that is incremented each time the page enters the modified state and is used to determine whether the page contains data that is stale.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.