Laminated shielding inductor
US12073984B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2021 |
| Grant date | Aug 27, 2024 |
| Priority date | — |
| Expiry date | Mar 2, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F2027/2809
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A laminated shielding inductor includes a laminated body, an internal coil, and a shielding cover; the laminated body includes a plurality of insulator layers; shielding conductor through grooves which are located at the periphery of the internal coil are formed in the plurality of insulator layers; shielding conductors are arranged in the shielding conductor through grooves, are electrically and mutually connected and jointly form a shielding conductor laminated layer; a shielding conductor upper layer and a shielding conductor lower layer are respectively arranged above and below the internal coil; and the shielding conductor laminated layer, the shielding conductor upper layer and the shielding conductor lower layer are closed to form the shielding cover. Thus, high shielding effect of the laminated chip inductor can be realized, external radiation of the laminated chip inductor is effectively reduced, and the reliability of a circuit system is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.