Circuit assembly
US12074103B2 · kind B2 · utility
0Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2022 |
| Grant date | Aug 27, 2024 |
| Priority date | — |
| Expiry date | Jun 1, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/9202
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A circuit assembly includes an integrated circuit (IC) die and a capacitor die. The IC die has a first hybrid bonding layer. The capacitor die is stacked with the IC die, and is configured to include a capacitor coupled to the IC die, and has a second hybrid bonding layer in contact with the first hybrid bonding layer; wherein the IC die is electrically coupled to the capacitor die through the first hybrid bonding layer and the second hybrid bonding layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.