Integrated package structure
US12074116B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2020 |
| Grant date | Aug 27, 2024 |
| Priority date | — |
| Expiry date | May 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to an integrated package structure. The integrated package structure includes a main substrate, a first module, a second module, a cavity element and a large-size device, wherein the main substrate includes a first surface of the main substrate and a second surface of the main substrate opposite to each other; the first module and the second module are stacked; the first module and the second module which are stacked, the cavity element and the large-size device are horizontally arranged on the first surface of the main substrate, and are respectively electrically connected to the main substrate. Owing to this arrangement, the demand of a current integrated package structure for a further high-density, miniaturized, multi-dimensional and multi-demand layout design can be met.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.