Pixel arrangement structure and display panel
US12075676B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2021 |
| Grant date | Aug 27, 2024 |
| Priority date | — |
| Expiry date | Oct 8, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/353
Abstract
A pixel arrangement structure and a display panel. The pixel arrangement structure includes a plurality of pixel units. Each of the pixel units includes at least one pixel group. Each pixel group comprises one first sub-pixel, one second sub-pixel, and two third sub-pixels. The first sub-pixel, the second sub-pixel, and the two third sub-pixels in the pixel group form a virtual quadrilateral. A longest edge of first sub-pixel is arranged to at least partially overlap a first side of the virtual quadrilateral. A longest edge of the second sub-pixel is arranged to at least partially overlap a second side of the virtual quadrilateral. The first edge and the second edge intersect with each other. The pixel arrangement structure increases a pixel density, namely, increases a number of pixels per inch in the display panel, thus a display resolution of the display panel is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.