Virtual processor system and method utilizing discrete component elements
US12079650B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2020 |
| Grant date | Sep 3, 2024 |
| Priority date | — |
| Expiry date | Jul 18, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for the dynamic, run-time configuration of logic core register files, and the provision of an associated execution context. The dynamic register files as well as the associated execution context information are software-defined so as to be virtually configured in random-access memory. This virtualization of both the processor execution context and register files enables the size, structure and performance to be specified at run-time and tailored to the specific processing, instructions and data associated with a given processor state or thread, thereby minimizing both the aggregate memory required and the context switching time. In addition, the disclosed system and method provides for processor virtualization which further enhances the flexibility and efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.