Multi-layer polysilicon stack for semiconductor devices

US12080755B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Furen Lin · Chengdu, CN
• Yunlong Liu · Chengdu, CN
• Zhi Peng Feng · Chengdu, CN
• Rui Liu · Nanhu, CN
• Rui Song · Nanhu, CN
• Manoj Kumar Jain · Austin, US

Key dates

• Filing date: Oct 27, 2021
• Grant date: Sep 3, 2024
• Expiry date: Jan 22, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/716

Abstract

In a described example, a method of forming a capacitor includes forming a doped polysilicon layer over a semiconductor substrate. The method also includes forming a dielectric layer on the doped polysilicon layer. The method also includes forming an undoped polysilicon layer on the dielectric layer.