Display device including a transmission preventing pattern
US12082453B2 · kind B2 · utility
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15Claims
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Assignee
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Key dates
| Filing date | Jul 14, 2021 |
| Grant date | Sep 3, 2024 |
| Priority date | — |
| Expiry date | Jul 11, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2203/04103
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A display device may include a substrate including a display area, a thin film transistor disposed on the substrate, a via layer disposed on the thin film transistor, where a via hole is defined through the via layer to expose a part of the thin film transistor, a lower electrode disposed on the via layer, a pixel defining layer disposed on the via layer, where a step structure is defined in the pixel defining layer to overlap the via hole, and a transmission preventing pattern disposed on the pixel defining layer and overlapping the via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.