On-chip debugging device and method
US12085612B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2019 |
| Grant date | Sep 10, 2024 |
| Priority date | — |
| Expiry date | Sep 17, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3089
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An on-chip debugging device and method is provided. The on-chip debugging device includes: an external interface module configured for outputting chip debugging state information to an external debugger and receiving a control instruction of the external debugger; a debugging mode control module configured for setting a to-be-sampled type of a specified chip internal signal and setting a debugging trigger condition according to the debugging configuration of the external debugger or the internal CPU; a debugging monitor module configured for sampling and recording the internal signal of the chip of the specified type so as to identify the running state of the chip; and a debugging information processing module configured for storing the running state of the chip in an internal debugging memory and sending it to the external debugger by the external interface module or sending it to the internal CPU via an internal bus. The on-chip debugging functions which are relatively simple, occupy less resources and have more powerful functions can be realized by the device and the method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.