Patent · US Active

Memory controllers, storage devices, and controlling methods of storage devices

US12086408B2 · kind B2 · utility

0Cited by
7References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 3, 2022
Grant dateSep 10, 2024
Priority date
Expiry dateDec 30, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/7208
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory controller may include: a weight management unit configured to store a weight based on a read disturb strength of each of the plurality of word lines of the plurality of memory blocks; a counter configured to increase a read count of a management group that includes a target word line, based on the weight of the target word line obtained from the weight management unit, the counter configured to increase the read count in response to the controller receiving a read request for the target word line from an external host device; and a verification operation determination unit configured to determine whether to perform or to not perform a word line verification operation based on a comparison of a reference interval count with the read count of the management group that includes the target word line.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.